/****************************************************************************
 * defines.v
 ****************************************************************************/

/**
 * CPU核心主要常量定义
 */

// 寄存器传输延迟定义
`define REG_DLY             2

// 数据存储器位宽定义
`define DATA_WIDTH          16
`define DATA_ADDR_WIDTH     11

// 代码存储器位宽定义
`define CODE_WIDTH          16
`define CODE_ADDR_WIDTH     12

// 寄存器个数及索引位宽定义
`define REG_WIDTH           16
`define REG_NUM             16
`define REG_ID_WIDTH        5

// 指令信息总线相关定义
// rglr单元指令定义
`define INSTR_INFO_RGLR_ADD     0
`define INSTR_INFO_RGLR_SUB     (`INSTR_INFO_RGLR_ADD + 1)
`define INSTR_INFO_RGLR_SLT     (`INSTR_INFO_RGLR_SUB + 1)
`define INSTR_INFO_RGLR_SLTU    (`INSTR_INFO_RGLR_SLT + 1)
`define INSTR_INFO_RGLR_SLL     (`INSTR_INFO_RGLR_SLTU + 1)
`define INSTR_INFO_RGLR_SRL     (`INSTR_INFO_RGLR_SLL + 1)
`define INSTR_INFO_RGLR_SRA     (`INSTR_INFO_RGLR_SRL + 1)
`define INSTR_INFO_RGLR_XOR     (`INSTR_INFO_RGLR_SRA + 1)
`define INSTR_INFO_RGLR_OR      (`INSTR_INFO_RGLR_XOR + 1)
`define INSTR_INFO_RGLR_AND     (`INSTR_INFO_RGLR_OR + 1)
`define INSTR_INFO_RGLR_MUL     (`INSTR_INFO_RGLR_AND + 1)
`define INSTR_INFO_RGLR_MULU    (`INSTR_INFO_RGLR_MUL + 1)
`define INSTR_INFO_RGLR_WIDTH   (`INSTR_INFO_RGLR_MULU + 1)

// lsu单元指令定义
`define INSTR_INFO_LSU_LH       0
`define INSTR_INFO_LSU_SH       (`INSTR_INFO_LSU_LH + 1)
`define INSTR_INFO_LSU_LW       (`INSTR_INFO_LSU_SH + 1)
`define INSTR_INFO_LSU_SW       (`INSTR_INFO_LSU_LW + 1)
`define INSTR_INFO_LSU_WIDTH    (`INSTR_INFO_LSU_SW + 1)

// bjp单元指令定义
`define INSTR_INFO_BJP_JALR     0
`define INSTR_INFO_BJP_JAL      (`INSTR_INFO_BJP_JALR + 1)
`define INSTR_INFO_BJP_BEQ      (`INSTR_INFO_BJP_JAL + 1)
`define INSTR_INFO_BJP_BNE      (`INSTR_INFO_BJP_BEQ + 1)
`define INSTR_INFO_BJP_BLT      (`INSTR_INFO_BJP_BNE + 1)
`define INSTR_INFO_BJP_BGE      (`INSTR_INFO_BJP_BLT + 1)
`define INSTR_INFO_BJP_WIDTH    (`INSTR_INFO_BJP_BGE + 1)

// csr读写指令定义
`define INSTR_INFO_CSR_CSRRS    0
`define INSTR_INFO_CSR_CSRRC    (`INSTR_INFO_CSR_CSRRS + 1)
`define INSTR_INFO_CSR_CSRRW    (`INSTR_INFO_CSR_CSRRC + 1)
`define INSTR_INFO_CSR_CSRRR    (`INSTR_INFO_CSR_CSRRW + 1)
`define INSTR_INFO_CSR_WIDTH    (`INSTR_INFO_CSR_CSRRR + 1)

// long模块指令定义
`define INSTR_INFO_LONG_DIV      0
`define INSTR_INFO_LONG_SQRT     (`INSTR_INFO_LONG_DIV + 1)
`define INSTR_INFO_LONG_COS      (`INSTR_INFO_LONG_SQRT + 1)
`define INSTR_INFO_LONG_WIDTH    (`INSTR_INFO_LONG_COS + 1)

// ctrl模块指令定义
`define INSTR_INFO_CTRL_HLT      0
`define INSTR_INFO_CTRL_LUI      (`INSTR_INFO_CTRL_HLT + 1)
`define INSTR_INFO_CTRL_WIDTH    (`INSTR_INFO_CTRL_LUI + 1)

// 选择上面模块总线宽度最大的作为合并的总线宽度
`define INSTR_INFO_BUS_WIDTH     (`INSTR_INFO_RGLR_WIDTH)

// CSR寄存器位定义
`define CSR_BIT_EQ               0
`define CSR_BIT_NE               (`CSR_BIT_EQ + 1)
`define CSR_BIT_LT               (`CSR_BIT_NEQ + 1)
`define CSR_BIT_GE               (`CSR_BIT_LT + 1)